This morning, I found this T.I. app note and saw issues. They aren’t exactly subtle. For fun, I am posting here. What would you catch about this during a table top design review?
https://imgur.com/a/GUN1w2r
This morning, I found this T.I. app note and saw issues. They aren’t exactly subtle. For fun, I am posting here. What would you catch about this during a table top design review?
https://imgur.com/a/GUN1w2r
They used a “~” for the “supply” symbol instead of a DC source symbol. Other than that, I can’t find any problems.
Things I am not crazy about:
1) No bandwidth limiting on the input, leaving open suscepability to false triggering on R.F. or noise.
2) No C across Z1. This would improve the dynamic (AC) response of this reference.
3) Zeners may have have significant tempcos. A bandgap reference instead, would be better here.
4) More subtle, R4 is high enough that when combined with Cgs, T1 turnon/off may be too slow.
5) A resistor across Z2 would negate their first design note so this comparator πππππ be open collector (/drain). I like setting a parallel resistor across Z2 such that Vgs is not exceeded in the off chance that Z2 would fail open.
Fun stuff!
π